CH Precision's D1 Reference grade SACD & CD unit exemplifies state-of-the-art Swiss precision and utmost dedication to faithful musical reproduction. 

Built around the Esoteric VMK-5 VRDS SACD & CD pick-up mechanism, the D1 offers a fully modular and evolutive architecture based on optional slot-in boards for its audio outputs. Almost any configuration ranging from a simple stereo analog only player to a multi-channel purely digital drive is allowed.

The user interface is based on an ergonomically designed dual concentric rotatory knob with push function and feedback is given by a color-programmable high-definition AMOLED display. A custom infrared remote control allows access to the D1's most common functions.

Optical reading

Built around the Teac VMK-5 pick-up mechanism, the D1 offers state-of-the-art reading capability thanks to its VRDS-NEO technology. It is able to read the following discs formats:

• regular CDs, including CD-R/RW ones that have been finalized
• stereo SACDs, single layer or hybrid types
• multichannel SACDs

The optical reading mechanism has been tightly coupled to the D1 chassis to ensure the best vibration-free reading. The entire chassis isolates the reading mechanism from external vibrations and warranties an error-free data stream from the disc.

Modularity

Up to four output boards allow the unit to include many output types. One digital output board - for left and right front channels - is provided in base configuration, while three slots are kept free and can be fitted from factory or after product installation with the following board types:

• digital output board (1x AES/EBU, 1x S/PDIF, 1x Toslink and 1x CH Link) for surround channels
• stereo analog output board (1x XLR impedance-balanced and 1x RCA single-ended) for all six channels
• a pair of monaural analog output boards (1x XLR balanced, 1x RCA and 1x BNC single-ended) for left and right channels

This modularity allows the D1 to be configured as a stereo or multi-channel drive, with digital and/or analog outputs.

Timing & clocking

Extreme care has been given to the timing of the audio conversion. The clocking section of the D1 is based on an ultra-low jitter digitally-controlled VCXO.

Internally the VMK-5 control boards are clock-slaved on the internal VCXO and the digital audio data stream is re-synchronized in a central FPGA just prior the digital output buffers, or just prior each D/A conversion chip when optional analog output boards are used. This ensures a jitter-free signal, both in digital and analog domains.

When equipped with the optional synchronization board, the D1 can be used with external clock generators - or it can receive from the C1 D/A controller a synchronization clock - on which its internal VCXO is slaved.

Digital outputs

The CH-Link interface allows for synchronized transfer of High Definition audio content and control over a single connection and is the optimal link between the D1 and the matching C1 D/A controller. Audio data on CH-Link is cyphered when an SACD is read, the original DSD stream can be decoded into the C1 for optimal performances.

It has to be noted that the DSD stream from SACDs is downsampled in PCM at 16bit/44.1kHz for all AES/EBU, S/PDIF and Toslink digital outputs. This is due to legal restrictions and is absolutely not related to the D1 ability to transform the DSD stream into a hi-resolution PCM stream.

D/A conversion

The digital to analog converter boards are equipped with a single integrated D/A chip per channel. Its internal interpolation filters are used, and an analog balanced signal is provided.This converter chip is a multibit delta-sigma type and embedds many selectable filters.

Analog stages

All analog stages inside the D1 are built only with discrete components, no operational amplifier have been used into these sections. This deliberate choice warranties the shortest path for the audio signal and allows the use of custom-made building blocks. All analog stages have the following features:

• no use of global negative feedback
• operating mode in pure class A
• fully symetrical design

No capacitors have been used in the signal path to ensure the maximum transparency.